A CRegs implementation study based on the MIPS-X RISC processor

Most high-performance computers use registers to store program variables and temporaries for fast access, but many variables cannot be allocated to registers because of ambiguous aliases. Cache can be used to store these variables but does not provide the advantages of registers. A memory structure, CRegs, proposed by H. Dietz and C. Chi, (1988), provides the advantages of registers for variables previously allocated to cache. The feasibility of adding a CRegs file to the MIPS-X processor by providing the organization, high-level timing, and key circuits necessary to implement the feature is explored. This design allows a CReg file to be added to the processor without increasing the cycle time or imposing an exorbitant hardware cost