• DocumentCode
    1661975
  • Title

    Technology mapping via transformations of function graphs

  • Author

    Chang, S.-C. ; Marek-Sadowska, M.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
  • fYear
    1992
  • Firstpage
    159
  • Lastpage
    162
  • Abstract
    The authors address the problem of how to realize a given combinational circuit described by means of Boolean equations using the minimum number of blocks of the target TLU table lookup architecture. Their Boolean decomposition scheme works directly on a reduced ordered binary decision diagram (ROBDD) of a subject function, using two techniques. The first, referred to as cutting, is an efficient implementation of Roth-Karp decomposition. The second technique is referred to as a substitution. The idea is to replace subgraphs of ROBDD by new variables. The substitution process is accompanied by certain reductions of the resulting ROBDD graph, which further decreases its size.<>
  • Keywords
    Boolean functions; combinatorial circuits; logic design; table lookup; Boolean equations; Roth-Karp decomposition; combinational circuit; minimum number of blocks; reduced ordered binary decision diagram; subject function; target TLU table lookup architecture; technology mapping; transformations of function graphs; Boolean functions; Combinational circuits; Computer architecture; Data structures; Design engineering; Electronics packaging; Integrated circuit interconnections; Programmable logic arrays; Prototypes; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
  • Conference_Location
    Cambridge, MA, USA
  • Print_ISBN
    0-8186-3110-4
  • Type

    conf

  • DOI
    10.1109/ICCD.1992.276240
  • Filename
    276240