• DocumentCode
    1662032
  • Title

    MARVLE: a VLSI chip for variable length encoding and decoding

  • Author

    Mukherjee, A. ; Flieder, J.W. ; Ranganathan, N.

  • Author_Institution
    Dept. of Comput. Sci., Central Florida Univ., Orlando, FL, USA
  • fYear
    1992
  • Firstpage
    170
  • Lastpage
    173
  • Abstract
    The design and implementation of a CMOS VLSI chip for data compression and decompression, using tree-based codes are described. The chip, called MARVLE, implements a memory-based architecture, for variable length encoding and decoding based on tree-based codes. The chip implements an architecture that is based on an efficient scheme for mapping the tree representing any binary code onto a memory device. A prototype 2-μm chip has been designed and verified, and fabricated by MOSIS. The chip can yield a compression rate of 57 Mb/s and a decompression rate of 31 Mb/s with a clock rate of 50 MHz. The VLSI hardware can be used to implement the JPEG baseline compression scheme
  • Keywords
    CMOS integrated circuits; VLSI; decoding; digital signal processing chips; encoding; CMOS; JPEG baseline compression; MARVLE; MOSIS; VLSI chip; binary code; data compression; decoding; decompression; design; freq 50 MHz; implementation; mapping; memory-based architecture; tree-based codes; variable length encoding; Binary codes; Clocks; Data compression; Decoding; Encoding; Hardware; Memory architecture; Prototypes; Transform coding; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-3110-4
  • Type

    conf

  • DOI
    10.1109/ICCD.1992.276242
  • Filename
    276242