DocumentCode :
1662110
Title :
Interconnect modeling and design in high-speed VLSI/ULSI systems
Author :
Oh, Soo-Young ; Chang, Keh-Jeng ; Chang, Norman ; Lee, Ken
Author_Institution :
Hewlett Packard, Palo Alto, CA, USA
fYear :
1992
Firstpage :
184
Lastpage :
189
Abstract :
A batch-oriented interconnect modeling system, IPDA (Interconnect Performance Design Assistant), developed for interconnect modeling and design in high-speed VLSI/ULSI systems, is presented. Intrachip communication is degraded by RC delay and crosstalk, and electromigration generates a serious reliability problem. Several approaches for alleviating these problems are quantitatively analyzed, and optimum approaches are recommended. In the interchip communication, reflection, crosstalk, and simultaneous switching noise, degrade the system performance. Approaches for solving these problems are introduced and analyzed for practical applications
Keywords :
VLSI; integrated circuit technology; microprocessor chips; Interconnect Performance Design Assistant; RC delay; ULSI; VLSI; batch-oriented interconnect modeling system; crosstalk; electromigration; interchip communication; reflection; simultaneous switching noise; Degradation; Delay; Design optimization; Dielectric constant; Integrated circuit interconnections; Integrated circuit modeling; Numerical simulation; SPICE; Ultra large scale integration; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-3110-4
Type :
conf
DOI :
10.1109/ICCD.1992.276245
Filename :
276245
Link To Document :
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