Title :
Directions in future high end processors
Author :
Sai-Halasz, G.A.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
Results based on a new cycle-time model are presented to demonstrate performance trends for complex bipolar ECL-CSEF and CMOS processors. It is shown that performance constraints are quite different for these two systems. For a given design the performance of a CMOS processor is tied to lithography, whereas future CSEF bipolar processors will be gated primarily by the power density capability of the package. Liquid nitrogen temperature (LN2) CMOS is seen as having the potential to become the highest performance technology for mainframe uniprocessors
Keywords :
BiCMOS integrated circuits; emitter-coupled logic; microprocessor chips; CMOS processors; LN2; VLSI; complex bipolar ECL-CSEF; cycle-time model; high end processors; lithography; performance trends; power density capability; CMOS process; CMOS technology; Circuits; Delay; Lithography; Packaging; Semiconductor device modeling; Signal processing; Wires; Wiring;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-3110-4
DOI :
10.1109/ICCD.1992.276256
