Title :
A compact programmable analog classifier using a VMM + WTA network
Author :
Ramakrishnan, Shankar ; Hasler, J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
We present the VMM+WTA structure as a general-purpose, low-power, compact, programmable classifier architecture and demonstrate its equivalence to a 2-layer perceptron. The classifier generates event outputs and is suitable for integration with event-driven systems. We present measured data from simple linear and non-linear classifier structures on a 0.35μm chip and demonstrate the implementation of an XOR function using a 1-layer VMM+WTA classifier.
Keywords :
analogue computers; logic gates; signal processing; 1-layer VMM+WTA classifier; 2-layer perceptron; VMM+WTA structure; XOR function; compact architecture; compact programmable analog classifier; event-driven systems; low-power architecture; nonlinear classifier structures; programmable classifier architecture; winner-take-all; Artificial neural networks; Hardware; Logic gates; Neurons; Signal processing; Speech recognition; analog signal processing; classifiers; programmable analog computing;
Conference_Titel :
Acoustics, Speech and Signal Processing (ICASSP), 2013 IEEE International Conference on
Conference_Location :
Vancouver, BC
DOI :
10.1109/ICASSP.2013.6638113
