Title :
Dead-time compensation for multilevel cascaded H-bridge converters with novel voltage balancing
Author :
Betz, R.E. ; Summers, T.J. ; Mirzaeva, G.
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Univ. of Newcastle, Newcastle, NSW, Australia
Abstract :
A novel capacitor voltage balancing algorithm for cascaded H-bridge converters can lead to undesirable voltage spikes at the output of the converter. This paper describes the voltage balancing algorithm and how it produces the voltage spikes. A simple and elegant solution is then developed and simulation results are presented to demonstrate its performance.
Keywords :
bridge circuits; compensation; power convertors; capacitor voltage balancing algorithm; dead-time compensation; multilevel cascaded H-bridge converter; voltage spikes; Automatic voltage control; Bridge circuits; Capacitors; Clustering algorithms; Frequency; Leg; Pulse width modulation; Pulse width modulation converters; Topology; Voltage control; Multilevel Converters; Pulse Width Modulation; Static Synchronous Compensator;
Conference_Titel :
Power Electronics and Applications, 2009. EPE '09. 13th European Conference on
Conference_Location :
Barcelona
Print_ISBN :
978-1-4244-4432-8
Electronic_ISBN :
978-90-75815-13-9
