DocumentCode
1662888
Title
Quality improvement methods for system-level stimuli generation
Author
Emek, Roy ; Jaeger, Itai ; Katz, Yoav ; Naveh, Yehuda
Author_Institution
IBM Res. Lab., Haifa Univ., Israel
fYear
2004
Firstpage
204
Lastpage
206
Abstract
Functional verification of systems is aimed at validating the integration of previously verified components. It deals with complex designs, and invariably suffers from scarce resources. We present a set of methods, collectively known as testing knowledge, aimed at increasing the quality of automatically generated system-level test-cases. Testing knowledge reduces the time and effort required to achieve high coverage of the verified design.
Keywords
automatic test pattern generation; formal verification; automatically generated system level test; functional verification; quality improvement methods; system level stimuli generation; testing knowledge; Automatic testing; Bridges; Computer bugs; Engines; Hardware; Laboratories; System testing; Test pattern generators; Vehicles;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on
ISSN
1063-6404
Print_ISBN
0-7695-2231-9
Type
conf
DOI
10.1109/ICCD.2004.1347923
Filename
1347923
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