• DocumentCode
    1662902
  • Title

    Exploration of tile/triangle-based rendering approaches for 3D graphics SoC

  • Author

    Yeh, Chi-Tsai ; Lin, Ching-Yuan ; Chiou, Wen ; Huang, Ing-Jer

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
  • fYear
    2010
  • Firstpage
    227
  • Lastpage
    230
  • Abstract
    Three dimension (3D) graphics applications have been widely used in handheld devices which are an inevitable tendency in the future. In this paper, we model a complex 3D graphics SoC hardware by using SystemC and run some testbenches on this platform. For speeding up the simulation time, we adopt Transaction Level Model (TLM) and implement two type of rendering approaches, tile-based and triangle-based, to find out the optimal architecture. According to experimental results, triangle-based rendering is 9-24% faster than tile-based rendering in smaller objects. Considering the energy consumption, the number of memory access of the former is 6-43% less than the latter.
  • Keywords
    notebook computers; rendering (computer graphics); system-on-chip; 3D graphics SoC; handheld devices; tile-based rendering; tile/triangle-based rendering approaches; transaction level model; Bandwidth; Biological system modeling; IP networks; Libraries; Pixel; Presses; Rendering (computer graphics);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Next-Generation Electronics (ISNE), 2010 International Symposium on
  • Conference_Location
    Kaohsiung
  • Print_ISBN
    978-1-4244-6693-1
  • Type

    conf

  • DOI
    10.1109/ISNE.2010.5669157
  • Filename
    5669157