Title :
A numerical study of RF performance for a junctionless vertical MOSFET
Author :
Tai, Chih-Hsuan ; Lin, Jyi-Tsong ; Eng, Yi-Chuen ; Lu, Kuan-Yu ; Chen, Cheng-Hsin ; Chang, Yu-Che ; Fan, Yi-Hsuan
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Abstract :
In this paper, for the first time, we demonstrate the radio frequency (RF) performance of a junctionless vertical MOSFET (JLVMOS). According to the numerical simulation results, the JLVMOS can obtain higher gm, lower gd, in comparison to a junctionless planar SOI MOSFET. This because the vertical double-gate (DG) scheme truly helps to increase the gate controllability over the channel region, resulting in reduced short-channel effects (SCEs).
Keywords :
MOSFET; silicon-on-insulator; SOI; junctionless vertical MOSFET; radio frequency performance; short-channel effects; vertical double-gate scheme; Doping; Logic gates; double-gate (DG); junctionless vertical MOSFET (JLVMOS); radio frequency (RF); short-channel effects (SCEs);
Conference_Titel :
Next-Generation Electronics (ISNE), 2010 International Symposium on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4244-6693-1
DOI :
10.1109/ISNE.2010.5669162
