Title :
Frontend frequency-voltage adaptation for optimal energy-delay2
Author :
Magklis, Grigorios ; González, José ; González, Antonio
Author_Institution :
Intel Barcelona Res. Center, Univ. Politecnica de Catalunya, Barcelona, Spain
Abstract :
In this paper, we present a clustered, multiple-clock domain (CMCD) microarchitecture that combines the benefits of both clustering and globally asynchronous locally synchronous (GALS) designs. We also present a mechanism for dynamically adapting the frequency and voltage of the frontend of the CMCD with the goal to optimize the energy-delay2 product (ED2P). Our mechanism has minimal hardware cost, is entirely self-adjustable, does not depend on any thresholds, and achieves results close to optimal. We evaluate it on 16 SPEC 2000 applications and report 17.5% ED2P reduction on average (80% of the upper bound).
Keywords :
computer architecture; microprocessor chips; clustered microarchitecture; frontend frequency-voltage adaptation; globally asynchronous locally synchronous design; multiple clock domain microarchitecture; optimal energy delay; Clocks; Computer architecture; Control systems; Delay; Dynamic voltage scaling; Frequency; Microarchitecture; Microprocessors; Power dissipation; Wire;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on
Print_ISBN :
0-7695-2231-9
DOI :
10.1109/ICCD.2004.1347930
