• DocumentCode
    1663136
  • Title

    Fault simulation and test generation by fault sampling techniques

  • Author

    Al-Arian, Sami A. ; Al-Kharji, Musaed A.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., South Florida Univ., Tampa, FL, USA
  • fYear
    1992
  • Firstpage
    365
  • Lastpage
    368
  • Abstract
    Novel techniques and procedures for choosing a sample from the entire fault population are presented. The fault coverage evaluation of the sample and the fault population, given a random test set, are evaluated and proved to be equal, or within a sampling error (± e), which represents the difference between the fault coverages of the sample and the total fault population. The sampling procedures presented are applied in such a way that e is small. Moreover, the sample is not purely random but in fact mirrors the total fault distribution. The expected test length and fault coverage evaluation of a given random test set, applied or generated for a given circuit, are calculated. For the example used in this study, exact detection probabilities for every fault in the circuit are calculated
  • Keywords
    VLSI; fault location; integrated circuit testing; VLSI; expected test length; fault coverage evaluation; fault sampling; fault simulation; random test set; sampling error; sampling procedures; test generation; total fault population; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer science; Costs; Electrical fault detection; Fault detection; Probability; Sampling methods;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-3110-4
  • Type

    conf

  • DOI
    10.1109/ICCD.1992.276290
  • Filename
    276290