Title :
An embedded reconfigurable SIMD DSP with capability of dimension-controllable vector processing
Author :
Han, Liang ; Chen, Jie ; Zhou, Chaoxian ; Li, Ying ; Zhang, Xin ; Liu, Zhibi ; Wei, Xiaoyun ; Li, Baofeng
Author_Institution :
Inst. of Microelectron., Chinese Acad. of Sci., Beijing, China
Abstract :
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data streams (SIMD) and reconfigurable architecture. Equipped with eight SIMD-controlled 16-bit datapaths which can also be reconfigured as two 32-bit datapaths, the DSP core can process both 16-bit and 32-bit data in parallel, showing high performance, especially in the applications preferring parallel data flow computations, such as image processing. The SIMD scheme is extended with the instant-scalability of datapaths (ISSIMD), which offers the DSP a capability of dimension-controllable vector processing, so that to provide flexibility for different embedded applications. A first prototype in 0.18-μm CMOS technology has been fabricated, which achieves IGMACS performance at the clock of 125 MHz.
Keywords :
CMOS integrated circuits; digital signal processing chips; embedded systems; integrated circuit design; parallel processing; reconfigurable architectures; 0.18 micron; 125 MHz; CMOS technology; dimension controllable vector processing; embedded systems; multiple data streams; programmable parallel digital signal processor; reconfigurable SIMD DSP core; reconfigurable architecture; single instruction stream; CMOS technology; Concurrent computing; Data flow computing; Digital signal processing; Digital signal processors; High performance computing; Image processing; Prototypes; Reconfigurable architectures; Streaming media;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on
Print_ISBN :
0-7695-2231-9
DOI :
10.1109/ICCD.2004.1347960
