Cycling verify: fault diagnosis for linear analog circuits based on symbolic calculus and interval algebra

This paper is intended to show the possibility of performing fault location and identification in the case of single or double faults in analog circuits with a symbolic algorithm that allows using few observable points. A group of test equations, obtained from the symbolic solution of the circuit, is cyclically solved in turn for each group of parameters under test, leaving the other ones at their rated value. A validation equation, still obtained from the same symbolic solution, has the task of validating the faulty or non-faulty situation for those parameters.