DocumentCode :
1665182
Title :
Fast test for hot-carriers lifetime prediction [CMOS devices]
Author :
Lisenker, Boris
Author_Institution :
Tower Semicond. Ltd., Migdal Haemeh, Israel
fYear :
1996
Firstpage :
263
Lastpage :
266
Abstract :
A short loop technique is proposed to be used for monitoring on product line CMOS devices sensitiveness to hot carrier induced degradation. This method is based on evaluation of interface state generation rate under gate constant current stress. Data presented show an excellent correlation to conventional hot-carrier lifetime testing. The proposed technique can be implemented as part of a standard electrical test at wafer level
Keywords :
CMOS integrated circuits; carrier lifetime; hot carriers; integrated circuit manufacture; integrated circuit testing; monitoring; production testing; fast test; gate constant current stress; hot carrier induced degradation; hot-carriers lifetime prediction; interface state generation rate; monitoring; product line CMOS devices sensitiveness; real time process feedback; short loop technique; Degradation; Hot carriers; Interface states; Life estimation; Life testing; MOSFET circuits; Semiconductor device testing; Stress; Threshold voltage; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Electronics Engineers in Israel, 1996., Nineteenth Convention of
Conference_Location :
Jerusalem
Print_ISBN :
0-7803-3330-6
Type :
conf
DOI :
10.1109/EEIS.1996.566945
Filename :
566945
Link To Document :
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