Title :
Reconfigurable processor architectures for mobile phones
Author :
Vorbach, Martin ; Becker, Jürgen
Author_Institution :
PACT XPP Technol. AG, Munich, Germany
Abstract :
This paper describes a new dynamically configurable system-on-chip (CSoC) concept and integration, consisting of an ARM7 EJS processor-core, a coarse-grain 4×4 XPP-array from PACT XPP Technologies AG, and application-tailored global/local memory topology with efficient Amba-based communication interfaces. The system and introduced CSoC architecture is optimized for the mobile communication algorithm scenario. The paper gives an overview of the overall system concept, the hardware datapath structures and their integration as well as discussing some selected application implementation results within this target area.
Keywords :
memory architecture; mobile radio; parallel architectures; reconfigurable architectures; system-on-chip; ARM7 EJS processor-core; Amba-based communication interfaces; CSoC; PACT XPP Technologies AG; application-tailored global/local memory topology; coarse-grain 4×4 XPP-array; dynamically configurable system-on-chip; hardware datapath structures; mobile communication algorithm; mobile telephones; reconfigurable processor architectures; 3G mobile communication; Bridges; Computer architecture; Distributed processing; Hardware; Mobile handsets; Random access memory; Read-write memory; Software standards; Throughput;
Conference_Titel :
Parallel and Distributed Processing Symposium, 2003. Proceedings. International
Print_ISBN :
0-7695-1926-1
DOI :
10.1109/IPDPS.2003.1213334
