DocumentCode :
1665563
Title :
A high performance VLIW processor for finite field arithmetic
Author :
Grabbe, C. ; Bednara, M. ; von zur Gathen, J. ; Shokrollahi, J. ; Teich, J.
Author_Institution :
Paderborn Univ., Germany
fYear :
2003
Abstract :
Finite field arithmetic forms the mathematical basis for a variety of applications from the area of cryptography and coding. For finite fields of large extension degrees (as for cryptography), arithmetic operations are computation intensive and require dedicated hardware support under given timing constraints. We present a new architecture of a high performance VLIW processor that can perform basic field operations in parallel as well as complex instructions as needed for elliptic curve cryptography. The control path is microcoded, so the instruction set can easily be modified or extended. The modular data path structure along with an FPGA-optimized design facilitate adaption to various resource and timing requirements.
Keywords :
cryptography; digital arithmetic; field programmable gate arrays; logic design; multiprocessing systems; FPGA-optimized design; VLIW processor; arithmetic operations; coding; cryptography; dedicated hardware support; finite field arithmetic; high performance VLIW processor; instruction set; mathematical basis; modular data path structure; resource requirements; timing constraints; timing requirements; Algorithm design and analysis; Arithmetic; Computer architecture; Elliptic curve cryptography; Elliptic curves; Field programmable gate arrays; Galois fields; Process design; Timing; VLIW;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium, 2003. Proceedings. International
ISSN :
1530-2075
Print_ISBN :
0-7695-1926-1
Type :
conf
DOI :
10.1109/IPDPS.2003.1213351
Filename :
1213351
Link To Document :
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