DocumentCode :
1665698
Title :
Evolutionary reconfigurable architecture for robust face recognition
Author :
Jeon, In Ja ; Choi, Boung Mo ; Rhee, Phill Kyu
Author_Institution :
Dept. of Comput. Sci. & Eng., Inha Univ., Incheon, South Korea
fYear :
2003
Abstract :
This paper proposes a novel reconfigurable architecture with capability of evolution/adaptation, called ERM (evolutionary reconfigurable machine), and it is implemented partially on FPGA chip. Evolutionary module which has been implemented by parallel genetic algorithm evolves filter blocks, and feature space to achieve an optimal face recognition configuration of the ERM. Since a priori information of noise and system working environment are not available, heuristic intuitive decisions or time-consuming recursive calculations are usually required. The ERM can explore optimal configuration of filter combination, associated parameters, and structure of feature space adoptively to unknown illumination and noisy environments. Some of the commonly used filters such as median filter, histogram equalization filter, homomorphic filter and illumination compensation filter are designed and verified by implementing on FPGA hardware. Parallel genetic algorithm evolves the connection and parameters of image enhancement filters as well as feature space of Gabor representation. The ERM has been tested to the face recognition in varying environments of illumination and noise patterns. The varying illumination environments include light direction, contrast, brightness, and spectral composition. The proposed architecture for face recognition adapts itself to varying illumination and noisy environments using the evolutionary computing method. The experiment performed using the ERM shows very encouraging result, especially for changing illumination and noisy environments.
Keywords :
face recognition; field programmable gate arrays; filters; image enhancement; reconfigurable architectures; FPGA chip; Gabor representation; a priori information; evolutionary reconfigurable architecture; evolutionary reconfigurable machine; heuristic intuitive decisions; homomorphic filter; illumination compensation filter; image enhancement filters; median filter; parallel genetic algorithm; robust face recognition; time-consuming recursive calculations; Face recognition; Field programmable gate arrays; Gabor filters; Genetic algorithms; Hardware; Histograms; Lighting; Reconfigurable architectures; Robustness; Working environment noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium, 2003. Proceedings. International
ISSN :
1530-2075
Print_ISBN :
0-7695-1926-1
Type :
conf
DOI :
10.1109/IPDPS.2003.1213356
Filename :
1213356
Link To Document :
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