DocumentCode :
1666015
Title :
Design considerations on Field-Stop Layer processing in a trench-gate IGBT
Author :
Alessandria, Antonio ; Fragapane, Leonardo ; Morale, Giuseppe
Author_Institution :
STMicroelectron. s.r.l., Catania, Italy
fYear :
2009
Firstpage :
1
Lastpage :
6
Abstract :
In recent years a new device concept appeared in the IGBT technology. It is a structure between a PT and an NPT device, with a low-doped emitter, where the fundamental role is played by the field-stop layer. In this paper we fixed some considerations about a proper design of this layer. Some simulated and real electrical characteristics of a trench-gate emitter-implanted IGBT will be shown and correlated to the field-stop layer process parameters.
Keywords :
insulated gate bipolar transistors; NPT device; PT device; field-stop layer processing; low-doped emitter; trench-gate emitter-implanted IGBT; Buffer layers; Charge carrier lifetime; Electric variables; Electronics industry; Insulated gate bipolar transistors; Power semiconductor devices; Substrates; Switching loss; Uniform resource locators; Voltage; Design; IGBT; Power semiconductor device; Simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics and Applications, 2009. EPE '09. 13th European Conference on
Conference_Location :
Barcelona
Print_ISBN :
978-1-4244-4432-8
Electronic_ISBN :
978-90-75815-13-9
Type :
conf
Filename :
5278952
Link To Document :
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