• DocumentCode
    1666058
  • Title

    A two phase clock controlled SC inductance simulation circuit realized with one unity gain buffer

  • Author

    Ono, Toshio

  • Author_Institution
    Dept. of Electron. Eng., Saitama Inst. of Technol., Japan
  • fYear
    1989
  • Firstpage
    1709
  • Abstract
    A switched-capacitor (SC) inductance simulation circuit that simulates floating inductance using only one unity gain buffer (UGB) and is controlled by a two-phase clock is described. It is based on the bilinear s-to-Z transformation. A comparison between this and an SC inductor proposed previously by the author (IEEE Int. Symp. on Circ. & Syst. p.2237-9, 1988) is discussed. Experimental results for a third-order low-pass filter using the proposed SC inductor are described
  • Keywords
    active filters; active networks; inductors; low-pass filters; simulation; switched capacitor filters; switched capacitor networks; SC inductance simulation; active circuits; bilinear s-to-Z transformation; clocked controlled circuit; floating inductance; simulated inductor; switched-capacitor; third-order low-pass filter; two-phase clock; unity gain buffer; Band pass filters; Circuit simulation; Clocks; Frequency; Inductance; Inductors; Low pass filters; MOS capacitors; Resistors; Sensitivity analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1989., IEEE International Symposium on
  • Conference_Location
    Portland, OR
  • Type

    conf

  • DOI
    10.1109/ISCAS.1989.100694
  • Filename
    100694
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1666058