A 290µA, 3.2MHz 4-bit phase ADC for constant envelope, ultra-low power radio

This paper presents an implemented 4-bit phase ADC circuit. It introduces a model to calculate its dynamic range considering second order effects including non-linearity and offsets. The study also encompasses the phase resolution and validates the model with measurement results from the implemented chip. Our analysis shows that the phase ADC is extremely robust against circuit non-idealities and provides higher dynamic range compared to traditional amplitude ADCs while consuming lower power.