DocumentCode :
1666413
Title :
Design for Testability Using Architectural Descriptions
Author :
Chickermane, Vivek ; Lee, Jaushin ; Patel, Janak H.
fYear :
1992
Firstpage :
752
Keywords :
Algorithm design and analysis; Circuit faults; Circuit testing; Counting circuits; Data mining; Design for testability; Flip-flops; High performance computing; Sequential circuits; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1992. Proceedings., International
ISSN :
1089-3539
Print_ISBN :
0-7803-0760-7
Type :
conf
DOI :
10.1109/TEST.1992.527897
Filename :
527897
Link To Document :
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