Timing enhanced silicon SPAD design

Nowadays a growing number of applications require arrays of SPAD detectors with high photon-timing jitter performance. In order to attain this result without impairing the other device characteristics a clear understanding of the avalanche dynamics and statistics is mandatory. In this work we describe the argument, supported by simulations and experimental results, that led us to suggest a timing enhanced SPAD. We state that a P-i-N device with intrinsic layer thicker than 1.5μm not only should have better timing performance but also good noise if compared to traditional SPAD devices.