Title :
Dynamic modeling of inter-instruction effects for execution time estimation
Author :
Beltrame, G. ; Brandolese, C. ; Fornaciari, W. ; Salice, F. ; Sciuto, D. ; Trianni, V.
Author_Institution :
Politecnico di Milano, Italy
fDate :
6/23/1905 12:00:00 AM
Abstract :
The market for embedded applications is facing a growing interest in power consumption issues. The work presented is intended to provide a new model to estimate software-level power consumption of 32-bit microprocessors. This model extends previous ones by considering dynamic inter-instruction effects that take place during code execution, providing a static means to characterize their energy consumption. The model is formally sound; it is conceived for a generic architecture and it has been preliminarily validated on the Intel486TM architecture.
Keywords :
embedded systems; instruction sets; performance evaluation; pipeline processing; power consumption; software cost estimation; 32 bit; 32-bit microprocessors; Intel486 architecture; code execution; dynamic inter-instruction effects; dynamic modeling; embedded applications; energy consumption; execution time estimation; generic architecture; inter-instruction effects; power consumption issues; software-level power consumption; Application software; Computer architecture; Electronic design automation and methodology; Embedded system; Energy consumption; Hardware; Microprocessors; Permission; Pipelines; Power system modeling;
Conference_Titel :
System Synthesis, 2001. Proceedings. The 14th International Symposium on
Print_ISBN :
1-58113-418-5
DOI :
10.1109/ISSS.2001.156546
