• DocumentCode
    1667586
  • Title

    Task graph scheduling using timed automata

  • Author

    Abdeddaïm, Yasmina ; Kerbaa, Abdelkarim ; Maler, Oded

  • Author_Institution
    VERIMAG, Gieres, France
  • fYear
    2003
  • Abstract
    In this paper we develop a methodology for treating the problem of scheduling partially-ordered tasks on parallel machines. Our framework is based on the timed automaton model, originally developed for verification of real-time programs and digital circuits and more recently adapted for solving time-optimal scheduling problems. In this framework, the scheduling problem admits a state-space representation and an optimal schedule corresponds to a shortest path in the timed automaton. We check our implementation on numerous benchmarks and show how release times and deadlines can be easily incorporated into the model.
  • Keywords
    automata theory; processor scheduling; program verification; state-space methods; parallel machines; partially-ordered tasks scheduling; real-time programs verification; state-space representation; task graph scheduling; time-optimal scheduling; timed automata; Automata; Clocks; Digital circuits; Equations; Optimal scheduling; Parallel machines; Power system modeling; Real time systems; Scheduling algorithm; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium, 2003. Proceedings. International
  • ISSN
    1530-2075
  • Print_ISBN
    0-7695-1926-1
  • Type

    conf

  • DOI
    10.1109/IPDPS.2003.1213431
  • Filename
    1213431