• DocumentCode
    1667960
  • Title

    Datagram switching networks for broadband data communications

  • Author

    Decina, M. ; Giacomazzi, P. ; Pattavina, A. ; Tombolini, E.

  • Author_Institution
    CEFRIEL, Politecnico di Milano, Italy
  • fYear
    1992
  • Firstpage
    104
  • Abstract
    The preliminary design of a switch architecture for broadband networks that is capable of switching variable-length packets is addressed. The structure is assumed to be connectionless, so that no bandwidth reservation takes place before the user packet, or datagram, is transferred. Architectures based on input buffering, output buffering or shared buffering can be studied. Moreover, one can define datagram-asynchronous or datagram-synchronous architectures, based on the periodicity of the change in the switching configuration. For a datagram-synchronous architecture employing input buffering and based on a nonblocking interconnection network, algorithms for selecting the switching configuration are proposed and compared in terms of their associated traffic performance
  • Keywords
    broadband networks; data communication systems; electronic switching systems; packet switching; ATM; broadband data communications; broadband networks; datagram-asynchronous architecture; datagram-synchronous architectures; input buffering; nonblocking interconnection network; output buffering; shared buffering; switch architecture; switching configuration; traffic performance; variable-length packets; Asynchronous transfer mode; Broadband communication; Buffer storage; Communication switching; Data communication; Fabrics; Packet switching; Routing; Switches; Synchronous digital hierarchy;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Global Telecommunications Conference, 1992. Conference Record., GLOBECOM '92. Communication for Global Users., IEEE
  • Conference_Location
    Orlando, FL
  • Print_ISBN
    0-7803-0608-2
  • Type

    conf

  • DOI
    10.1109/GLOCOM.1992.276510
  • Filename
    276510