Synthesis support for design partitioning

As designs become larger and larger it becomes necessary to partition the design, not only to meet synthesis tool restrictions, but also to perform parallel design processing by multiple engineers and/or on multiple machines. Partitioning requires the assignment of timing and loading budgets across module boundaries. This is an inefficient and time-consuming task if performed by hand. Logic synthesis tools can utilize techniques of constraint propagation combined with hierarchical controls to perform this task automatically. This approach will result in improved results and shorter design times