Title :
A 530mV 10-lane SIMD processor with variation resiliency in 45nm SOI
Author :
Pawlowski, Robert ; Krimer, Evgeni ; Crop, Joseph ; Postman, Jacob ; Moezzi-Madani, Nariman ; Erez, Mattan ; Chiang, Patrick
Author_Institution :
Oregon State Univ., Corvallis, OR, USA
Abstract :
Near-threshold computing exhibits improved energy efficiency compared to nominal super-threshold operation [1, 2]. Two critical bottlenecks prevent mainstream adoption of low-VDD operation: degraded logic delay resulting in significantly lower throughput than at super-threshold, and excessive, unpredictable delay variation caused by increased sensitivity to process and dynamic variations.
Keywords :
delays; elemental semiconductors; microprocessor chips; multiprocessing systems; parallel processing; silicon; silicon-on-insulator; Near-threshold computing; SIMD processor; SOI; Si; energy efficiency; logic delay degradation; low-VDD operation; nominal super-threshold operation; size 45 nm; unpredictable delay variation; voltage 530 mV; Delay; Energy efficiency; Error analysis; Pipelines; Throughput; Weaving;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4673-0376-7
DOI :
10.1109/ISSCC.2012.6177105
