Title :
A BiCMOS wide-lock range fully integrated PLL
Author :
Fouzar, Y. ; Sawan, M. ; Savaria, Y.
Author_Institution :
Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada
fDate :
6/20/1905 12:00:00 AM
Abstract :
A fully integrated Phase Locked Loop (PLL) with wide lock range is presented in this paper. The designed structure of the PLL is based on the charge-pump type with a differential architecture Voltage Controlled Oscillator (VCO) building block. In the proposed VCO, current mirrors are used as the active load of the source-followers which allow a high stability of VCO oscillation within a wide control range. The PLL has been implemented in 0.8 μm BiCMOS technology without the need of any external components. It operates with a lock range of 14 to 420 MHz. The lock time is 15 μS. The resulting layout area and the power dissipation of the whole PLL are 0.65 mm2 and 18 mW respectively
Keywords :
BiCMOS analogue integrated circuits; circuit simulation; integrated circuit layout; integrated circuit measurement; phase locked loops; voltage-controlled oscillators; 0.8 mum; 14 to 420 MHz; 15 mus; 18 mW; BiCMOS wide-lock range fully integrated PLL; VCO oscillation stability; charge-pump type structure; current mirrors; differential architecture VCO building block; layout area; lock range; lock time; phase frequency detector; power dissipation; simulation; source-follower active load; BiCMOS integrated circuits; Charge pumps; Circuit topology; Clocks; Phase detection; Phase frequency detector; Phase locked loops; Switches; Voltage control; Voltage-controlled oscillators;
Conference_Titel :
Microelectronics, 1998. ICM '98. Proceedings of the Tenth International Conference on
Conference_Location :
Monastir
Print_ISBN :
0-7803-4969-5
DOI :
10.1109/ICM.1998.825617
