Title :
A dual-band frequency synthesizer for 802.11a/b/g with fractional-spur averaging technique
Author :
Pellerano, Stefano ; Levantino, Salvatore ; Samori, Carlo ; Lacaita, Andrea L.
Author_Institution :
Politecnico di Milano, Italy
Abstract :
A 0.25 μm BiCMOS spur-compensated fractional-N PLL is implemented in an IEEE 802.11a/b/g zero-IF transceiver. The synthesizer covers the 2.4 to 2.5GHz and the 5.1 to 5.9GHz bands with 0.5MHz and 5MHz resolution, respectively. The phase noise integrated from 10kHz to 10MHz is lower than 1.25° rms for any synthesized carrier. The power consumption is 39/59mW mode from 2.5V supply.
Keywords :
BiCMOS integrated circuits; IEEE standards; frequency synthesizers; phase locked loops; phase noise; transceivers; wireless LAN; 0.25 micron; 2.4 to 2.5 GHz; 2.5 V; 39 mW; 5.1 to 5.9 GHz; 59 mW; BiCMOS; IEEE 802.11a/b/g; dual-band frequency synthesizer; fractional-spur averaging; phase noise; spur-compensated fractional-N PLL; zero-IF transceiver; Charge pumps; Clocks; Dual band; Filters; Frequency conversion; Frequency synthesizers; Phase frequency detector; Phase locked loops; Voltage; Voltage-controlled oscillators;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1493890
