Title :
A 1.3TOPS H.264/AVC single-chip encoder for HDTV applications
Author :
Huang, Yu-Wen ; Chen, Tung-Chlen ; Chen-Han Tsai ; Chen, Ching-Yeh ; Chen, To-Wel ; Chen, Chl-Shi ; Shen, Chun-Fu ; Ma, Shyh-Yih ; Wang, Tu-Chih ; Bing-Yu Hsieh ; Fang, Hung-Chi ; Chen, Llang-Gee
Author_Institution :
Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
An H.264/AVC encoder is implemented on a 31.72mm2 die with 0.18μm CMOS technology. A four-stage macroblock pipelined architecture encodes 720p 30f/s HDTV videos in real time at 108MHz. The encoded video quality is competitive with reference software requiring 3.6TOPS on a general-purpose processor-based platform.
Keywords :
CMOS integrated circuits; code standards; high definition television; pipeline processing; video coding; 0.18 micron; 108 MHz; CMOS technology; H.264/AVC; HDTV applications; four-stage macroblock pipelined architecture; single-chip encoder; video coding; Automatic voltage control; Bandwidth; Bit rate; CMOS technology; Digital video broadcasting; HDTV; Heat engines; Motion estimation; Pipeline processing; Throughput;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1493902
