Title :
Circuit style comparison based on the variable voltage transfer characteristic and floating /spl beta/ ratio concept of partially depleted SOI
Author :
Das, K.K. ; Brown, R.B.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Abstract :
The concept of floating /spl beta/ has been proposed in the literature to describe the hysteretic behavior of the voltage transfer characteristic in PD-SOI devices. In this paper, we analyze in detail the transient transfer characteristic of PD-SOI and the related floating /spl beta/ ratio concept. We have also evaluated PD-SOI circuit techniques in the light of these findings and have made appropriate recommendations for circuit design.
Keywords :
CMOS integrated circuits; elemental semiconductors; integrated circuit design; silicon; silicon-on-insulator; CMOS design; PD-SOI devices; Si-SiO/sub 2/; circuit design; circuit style comparison; floating /spl beta/ ratio; hysteretic behavior; partially depleted SOI; transient transfer characteristic; variable voltage transfer characteristic; voltage transfer; Circuit synthesis; Clocks; Delay effects; Hysteresis; Pulse inverters; Steady-state; Switching circuits; Temperature; Transient analysis; Voltage;
Conference_Titel :
SOI Conference, 2001 IEEE International
Conference_Location :
Durango, CO, USA
Print_ISBN :
0-7803-6739-1
DOI :
10.1109/SOIC.2001.958007
