Title :
Emerging technologies and nanoscale computing fabrics
Author_Institution :
Lyon Inst. of Nanotechnol., Lyon, France
Abstract :
Summary form only given. It is widely recognized that CMOS transistor scaling, as a vector for the pursuit of performance levels predicted by Moore´s Law and required by future applications, will not last through the next decade. Alternatives must be found, at both architectural and device levels. In this context, the emergence of new research devices based on nanotubes (CNFET) or nanowires (NWFET), offers the opportunity to provide novel logic building blocks, to explore new possibilities for digital design and consequently to reconsider the paradigms of computing architectures to achieve orders of magnitude improvements in conventional figures of merit. In this talk, I will look at the emergence of technologies capable of building large regular structures out of silicon nanowires or carbon nanotubes, and how logic functions can be mapped onto them, particularly in the context of reconfigurable applications. Some pointers to the future evolution of these technologies and associated architectures will be given, as well as the issues that must be solved before nanoscale computing fabrics become a viable alternative to CMOS.
Keywords :
MOSFET; carbon nanotubes; elemental semiconductors; nanoelectronics; nanowires; silicon; CMOS transistor scaling; CNFET; Moore´s Law; NWFET; Si; architectural levels; carbon nanotubes; computing architectures; device levels; digital design; logic building blocks; logic functions; nanoscale computing fabrics; reconfigurable applications; silicon nanowires;
Conference_Titel :
Very Large Scale Integration (VLSI-SoC), 2009 17th IFIP International Conference on
Conference_Location :
Florianopolis
Print_ISBN :
978-1-4577-0237-2
DOI :
10.1109/VLSISOC.2009.6041320