DocumentCode :
1669546
Title :
90nm low leakage SoC design techniques for wireless applications
Author :
Royannez, Philippe ; Mair, Hugh ; Dahan, Franck ; Wagner, Mike ; Streeter, Mark ; Bouetel, Laurent ; Blasquez, Joel ; Clasen, Holger ; Semino, Giancarlo ; Dong, Julie ; Scott, David ; Pitts, Bob ; Raibaut, Claudine ; Ko, Uming
Author_Institution :
Texas Instrum., Villeneuve Loubet, France
fYear :
2005
Firstpage :
138
Abstract :
The new generation of multimedia-application processors requires a drastic leakage reduction to bring the standby current to 50μA. An efficient set of leakage reduction techniques, including power gating, memory retention, voltage scaling, and dual Vt, is employed on a 50M transistor, 80mm2 IC, fabricated in a 90nm CMOS technology, resulting in a 40× leakage reduction.
Keywords :
CMOS integrated circuits; leakage currents; mobile computing; multimedia communication; system-on-chip; 50 muA; 90 nm; CMOS technology; leakage reduction; low leakage SoC design; memory retention; multimedia-application processors; power gating; voltage scaling; wireless applications; Clocks; Diodes; Energy management; Graphics; Hardware; Instruments; Random access memory; Surges; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
0-7803-8904-2
Type :
conf
DOI :
10.1109/ISSCC.2005.1493907
Filename :
1493907
Link To Document :
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