Title :
Multi-layers with buried structures (MLBS): an approach to three-dimensional integration
Author :
Lei Xue ; Liu, C.C. ; Tiwari, S.
Author_Institution :
Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
Abstract :
A new multi-layers with buried structures (MLBS) approach that is suitable for three-dimensional integration is described. The silicon layering technique uses temperatures as low as 450 C, comparable to some of the steps in back-end-of-line processing of CMOS and provides a solution to temperature constraints in integration.
Keywords :
CMOS integrated circuits; buried layers; multilayers; silicon-on-insulator; 3D integration; 450 C; CMOS; MLBS; SOI; Si; back-end-of-line processing; layering technique; multilayers with buried structures approach; temperature constraints; Bonding processes; Chemical technology; Etching; Integrated circuit interconnections; Integrated circuit technology; Silicon; Surface fitting; Temperature; Tungsten; Wafer bonding;
Conference_Titel :
SOI Conference, 2001 IEEE International
Conference_Location :
Durango, CO, USA
Print_ISBN :
0-7803-6739-1
DOI :
10.1109/SOIC.2001.958014
