• DocumentCode
    1669905
  • Title

    A 66dB DR 1.2V 1.2mW single-amplifier double-sampling 2nd-order ΔΣ ADC for WCDMA in 90nm CMOS

  • Author

    Koh, Jinseok ; Choi, Yunyoung ; Gomez, Gabriel

  • Author_Institution
    Texas Instrum. Inc., Dallas, TX, USA
  • fYear
    2005
  • Firstpage
    170
  • Abstract
    A single-amplifier double-sampling second-order ΔΣ ADC with 5-level quantization is implemented in 90nm CMOS. To alleviate the capacitor mismatch issues in double sampling techniques, a single capacitor method is introduced, achieving 63dB peak SNDR and 66dB DR in a 1.94MHz bandwidth while consuming 1.2mW from a 1.2V supply.
  • Keywords
    3G mobile communication; CMOS integrated circuits; UHF amplifiers; analogue-digital conversion; delta-sigma modulation; signal sampling; 1.2 V; 1.2 mW; 1.94 MHz; 90 nm; CMOS; WCDMA; capacitor mismatch; double-sampling ΔΣ ADC; second-order ΔΣ ADC; single-amplifier ΔΣ ADC; Capacitors; Circuits; Delta modulation; Energy consumption; Filters; Multiaccess communication; Operational amplifiers; Quantization; Sampling methods; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-8904-2
  • Type

    conf

  • DOI
    10.1109/ISSCC.2005.1493923
  • Filename
    1493923
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1669905