DocumentCode :
1670030
Title :
A 0.18μm 102dB-SNR mixed CT SC audio-band ΔΣ ADC
Author :
Morrow, Paul ; Chamarro, Maria ; Lyden, Colin ; Ventura, Pablo ; Abo, Andrew ; Matamura, Atsushi ; Keane, Michael ; O´Brien, Richard ; Minogue, Paschal ; Mansson, Johan ; McGuinness, Niall ; McGranaghan, Martin ; Ryan, Ivan
Author_Institution :
Analog Devices, Limerick, Ireland
fYear :
2005
Firstpage :
178
Abstract :
A second-order mixed CT SC ΔΣ modulator uses multi-bit feedback to reduce clock-jitter sensitivity. The chip is implemented in 0.18μm CMOS using 3.3V I/O devices and achieves 102dB SNR in a 20kHz bandwidth by using chopper stabilization to reduce flicker noise. The ADC core draws 11.3mA from a 3.3V supply and occupies 0.65mm2.
Keywords :
CMOS integrated circuits; analogue-digital conversion; audio signal processing; choppers (circuits); circuit feedback; circuit stability; delta-sigma modulation; flicker noise; jitter; switched capacitor networks; 0.18 micron; 11.3 mA; 20 kHz; 3.3 V; CMOS; audio-band ΔΣ ADC; chopper stabilization; clock-jitter sensitivity; mixed CT SC ΔΣ ADC; multi-bit feedback; reduced flicker noise; second-order ΔΣ modulator; 1f noise; Bandwidth; Choppers; Circuit noise; Clocks; Jitter; MOS devices; Switches; Switching circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
0-7803-8904-2
Type :
conf
DOI :
10.1109/ISSCC.2005.1493927
Filename :
1493927
Link To Document :
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