Title :
A 0.5-1 V MTCMOS/SIMOX ROM macro with low-V/sub th/ memory cells
Author :
Douseki, T. ; Shibata, N. ; Yamada, J.
Author_Institution :
NTT Telecommun. Energy Labs., Kanagawa, Japan
Abstract :
In applying the SRAM technology to a ROM, it is necessary to use low-V/sub th/ memory cells while suppressing a leakage current. Conventional multi-threshold ROM. which consists of a high-V/sub th/ memory cell and suppresses the leakage current. operates at the supply voltage of 1 V, but there have been no memories that operate at a supply voltage down to 0.5 V. In this paper, we describe a MTCMOS/SIMOX ROM scheme with low-V/sub th/ memory cells, and a boosted word driver that makes possible high-speed operation at ultralow supply voltage of 0.5 V.
Keywords :
CMOS memory circuits; SIMOX; low-power electronics; read-only storage; 0.5 to 1 V; CMOS ratioed circuit; ROM macro; boost-enable signal; boosted word driver; decoder circuit; driver scheme; high-speed operation; low threshold voltage memory cells; multi-threshold CMOS/SIMOX ROM; ultralow supply voltage; CMOS logic circuits; CMOS memory circuits; CMOS technology; Decoding; Driver circuits; Frequency; MOSFET circuits; Random access memory; Read only memory; Voltage;
Conference_Titel :
SOI Conference, 2001 IEEE International
Conference_Location :
Durango, CO, USA
Print_ISBN :
0-7803-6739-1
DOI :
10.1109/SOIC.2001.958027
