DocumentCode :
1670086
Title :
Error flatten logarithm approximation for graphics processing unit
Author :
Zhu, Mengyao ; Xiao, Jianhua ; Wanggen, Wan ; Ha Yajun
Author_Institution :
Sch. of Commun. & Inf. Eng., Shanghai Univ., Shanghai, China
fYear :
2011
Firstpage :
1
Lastpage :
6
Abstract :
This paper propose a high performance algorithm for logarithm approximation. A piecewise linear interpolation with non-uniform partition is introduced to produce a flatten error distribution. Base on error flatten algorithm our method can produce greatly more accurate results than state-of-art logarithm approximation. Our proposed logarithm conversion is further optimized for hardware implementation. Analysis of simulation results in Matlab and hardware resources in FPGA illustrate that our method are superior or comparable to state-of-art logarithm conversion for graphics hardware.
Keywords :
approximation theory; field programmable gate arrays; graphics processing units; interpolation; FPGA; Matlab simulation; error flatten logarithm approximation; flatten error distribution; graphics processing unit hardware; hardware implementation; hardware resource; piecewise linear interpolation; Accuracy; Approximation algorithms; Hardware; Interpolation; Linear approximation; Piecewise linear approximation; Logarithm approximation; Piecewise linear interpolation; error flatten;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics (ICM), 2011 International Conference on
Conference_Location :
Hammamet
Print_ISBN :
978-1-4577-2207-3
Type :
conf
DOI :
10.1109/ICM.2011.6177377
Filename :
6177377
Link To Document :
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