Title :
A 10 Gb/s burst-mode CDR IC in 0.13 μm CMOS
Author :
Nogawa, Masafumi ; Nishimura, Kazuyoshi ; Kimura, Shunji ; Yoshida, Tomoaki ; Kawamura, Tomoaki ; Togashi, Minoru ; Kumozaki, Kiyomi ; Ohtomo, Yusuke
Author_Institution :
NTT, Atsugi, Japan
Abstract :
A 10 Gb/s burst-mode CDR (clock and data recovery) IC, that is eight times faster than previous burst-mode ICs, is fabricated in a 0.13 μm CMOS process. It amplifies an AC-coupled input burst by means of an edge detection technique, and extracts a clock within 5 UIs with a gated oscillator. It consumes 1.2 W from a 2.5 V supply.
Keywords :
CMOS integrated circuits; amplifiers; integrated circuit design; mixed analogue-digital integrated circuits; power consumption; synchronisation; 0.13 micron; 1.2 W; 10 Gbit/s; 2.5 V; AC-coupled input burst; CMOS process; burst-mode CDR IC; burst-mode IC; clock and data recovery; edge detection technique; gated oscillator; CMOS integrated circuits; Clocks; Data mining; Delay effects; Delay lines; Frequency; Optical receivers; Photonic integrated circuits; Pulse amplifiers; Threshold voltage;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1493952
