Title :
A 90nm CMOS single-chip GPS receiver with 5dBm out-of-band IIP3 2.0dB NF
Author :
Sahu, Debapriya ; Das, Abhijit ; Darwhekar, Yogesh ; Ganesan, Saravana ; Rajendran, Gireesh ; Kumar, Rakesh ; Chandrashekar, B.G. ; Ghosh, Anjana ; Gaurav, Anand ; Krishnaswamy, T. ; Goyal, Ashima ; Bhagavatheeswaran, Shanthi ; Low, Kah Mun ; Yanduru, Nav
Author_Institution :
Texas Instrum., Bangalore, India
Abstract :
A single-chip GPS receiver with a low-IF heterodyne RF front-end includes a LNA, image-reject IQ mixers, a passive poly-phase filter, and a fully integrated synthesizer. The IF-strip consists of a jammer-reject filter, a VGA, a ΔΣ ADC, and a digital IF-filter. The receiver dissipates 60 mA at 1.4 V and achieves a NF of 2 dB and out-of-band IIP3 of 5 dBm.
Keywords :
CMOS integrated circuits; Global Positioning System; digital filters; heterodyne detection; mixers (circuits); radio receivers; radiofrequency amplifiers; sigma-delta modulation; ΔΣ ADC; 1.4 V; 1575.42 MHz; 2 dB; 4.092 MHz; 60 mA; 90 nm; CMOS receiver; IF-strip; LNA; VGA; digital IF-filter; fully integrated synthesizer; image-reject IQ mixers; jammer-reject filter; low-IF heterodyne RF front-end; passive poly-phase filter; single-chip GPS receiver; Band pass filters; Clocks; Filtering; Finite impulse response filter; Global Positioning System; Jamming; Noise measurement; Noise shaping; RAKE receivers; Synthesizers;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1493992
