DocumentCode :
1671948
Title :
A 10Gb/s eye-opening monitor in 0.13 μm CMOS
Author :
Analui, Behnam ; Rylyakov, Alexander ; Rylov, Sergey ; Meghelli, Mounir ; Hajimiri, Ali
Author_Institution :
California Inst. of Technol., Pasadena, CA, USA
fYear :
2005
Firstpage :
332
Abstract :
An eye-opening monitor circuit in 0.13 μm CMOS operates from 1 to 12.5Gbit/s at 1.2V supply. It maps the input eye to a 2D error diagram with 68dB mask error dynamic range. Left and right halt of the eye are monitored separately to capture asymmetric eyes. Tested input amplitude is from 50 to 400mV. The chip consumes 330mW and works at 10Gb/s with a supply voltage as low as 1V.
Keywords :
CMOS integrated circuits; adaptive equalisers; signal sampling; 0.13 micron; 1.2 V; 10 Gbit/s; 2D error diagram; 330 mW; CMOS; asymmetric eyes; eye-opening monitor; Adaptive equalizers; CMOS technology; Circuits; Clocks; Cost function; Degradation; Monitoring; Output feedback; Sampling methods; Shape;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
0-7803-8904-2
Type :
conf
DOI :
10.1109/ISSCC.2005.1494004
Filename :
1494004
Link To Document :
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