DocumentCode
167250
Title
A Hybrid ILP-CP Model for Mapping Directed Acyclic Task Graphs to Multicore Architectures
Author
Emeretlis, A. ; Theodoridis, G. ; Alefragis, Panayiotis ; Voros, Nikolaos
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Patras, Patras, Greece
fYear
2014
fDate
19-23 May 2014
Firstpage
176
Lastpage
182
Abstract
Directed Acyclic Task Graphs serve as typical kernel representation for embedded applications. Modern embedded multicore architectures raise new challenges for efficient mapping and scheduling of task DAGs providing a large number of heterogeneous resources. In this paper, a hybrid Integer Linear Programming - Constraint Programming method that uses the Benders decomposition is used to find proven optimal solutions. The proposed method is augmented with cuts generation schemes for accelerating the solution process. Experimental results show that the proposed method systematically outperforms an ILP-based solution method.
Keywords
computer architecture; constraint handling; directed graphs; integer programming; linear programming; multiprocessing systems; Benders decomposition; DAG; constraint programming; cuts generation scheme; directed acyclic task graph; hybrid ILP-CP model; integer linear programming; kernel representation; multicore architecture; Complexity theory; Mathematical model; Multicore processing; Optimization; Processor scheduling; Program processors; Sequential analysis; DAG mapping; constraint programming; integer linear programming; multicore architectures; tasks scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel & Distributed Processing Symposium Workshops (IPDPSW), 2014 IEEE International
Conference_Location
Phoenix, AZ
Print_ISBN
978-1-4799-4117-9
Type
conf
DOI
10.1109/IPDPSW.2014.24
Filename
6969385
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