A low-leakage 2.5GHz skewed CMOS 32b adder for nanometer CMOS technologies

Author

Von Arnim, Klaus ; Seegebrecht, Peter ; Thewes, Roland ; Pacha, Christian

Author_Institution

Infineon Technol., Munich, Germany

fYear

2005

Firstpage

380

Abstract

A 32b parallel prefix adder demonstrates leakage-current-reduction capabilities of skewed CMOS logic. Sub-100nA leakage currents and single-cycle activation from standby mode is achieved using multi-tox logic gates in 90nm CMOS technology. The data path contains improved sense amplifier-based flip-flops and skewed CMOS logic adapted latches.

Keywords

CMOS logic circuits; adders; flip-flops; logic gates; 2.5 GHz; 90 nm; leakage-current reduction; low-leakage skewed CMOS 32b adder; multi-tox logic gates; nanometer CMOS technologies; parallel prefix adder; sense amplifier-based flip-flops; single-cycle activation; skewed CMOS logic adapted latches; standby mode; Adders; CMOS logic circuits; CMOS technology; Clocks; Latches; Leakage current; Logic devices; Logic gates; MOS devices; Power supplies;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

0-7803-8904-2

Type

conf

DOI

10.1109/ISSCC.2005.1494028

Filename

1494028

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1672519