DocumentCode
167252
Title
A Framework for Customizing Virtual 3-D Reconfigurable Platforms at Run-Time
Author
Siozios, K. ; Soudris, D. ; Hubner, M.
Author_Institution
Sch. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Athens, Greece
fYear
2014
fDate
19-23 May 2014
Firstpage
183
Lastpage
188
Abstract
Existing application domains exhibit variations in terms of complexity, performance and power consumption, whereas their efficient implementation onto general-purpose reconfigurable platforms is not always a viable solution. Towards this goal, throughout this paper, we introduce a software-supported framework for supporting efficient customization of these platforms. Rather than similar approaches, where the phase (design-time), our solution provides post-fabrication customization of architectural parameters based on application´s inherent requirements through a virtualization layer. For evaluation purposes, the introduced framework was applied to 3-D reconfigurable architectures. Experimental results with applications from various domains prove the effectiveness of our solution, as we achieve average delay and power reduction by 1.43X and 1.15X , respectively, as compared to the existing way for application implementation.
Keywords
field programmable gate arrays; reconfigurable architectures; virtualisation; 3D reconfigurable architectures; application domains; application requirements; architectural parameters; average delay; general-purpose reconfigurable platforms; power reduction; software-supported framework; virtual 3D reconfigurable platform customization; virtualization layer; Conferences; Distributed processing; Erbium; Field programmable gate arrays; Microprocessors; Neurons; Routing;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel & Distributed Processing Symposium Workshops (IPDPSW), 2014 IEEE International
Conference_Location
Phoenix, AZ
Print_ISBN
978-1-4799-4117-9
Type
conf
DOI
10.1109/IPDPSW.2014.201
Filename
6969386
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