• DocumentCode
    167254
  • Title

    Over-clocking of Linear Projection Designs through Device Specific Optimisations

  • Author

    Duarte, Rui Policarpo ; Bouganis, Christos-Savvas

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Imperial Coll. London, London, UK
  • fYear
    2014
  • fDate
    19-23 May 2014
  • Firstpage
    189
  • Lastpage
    198
  • Abstract
    Frequently, applications such as image and video processing rely on implementations of the Linear Projection algorithm with high throughput and low latency requirements. This work presents a framework to optimise Linear Projection designs that excel typical design implementations via a pre-characterisation of over-clocked arithmetic units. It is well known that the delay models used by synthesis tools are generic and tuned for the worst performance possible of a given fabrication process. Hence, they impose a heavy penalty in the possible maximum performance offered by the fabrication process. The proposed optimisation framework focuses on the optimisation of the generic multipliers, as they are the arithmetic operators with the most critical paths in the data path of a linear projection design, by performing a performance characterisation step on the target device. Experiments demonstrate that the proposed framework is able to generate Linear Projection designs that achieve higher throughput (up to 1.85 times) while producing less errors than typical implementation methodologies.
  • Keywords
    clocks; optimisation; arithmetic operators; delay models; device specific optimisations; fabrication process; generic multipliers; image processing; linear projection algorithm; linear projection designs; low latency requirements; optimisation framework; over clocking; over-clocked arithmetic units; performance characterisation step; synthesis tools; video processing; Clocks; Digital signal processing; Field programmable gate arrays; Hardware; Optimization; Performance evaluation; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel & Distributed Processing Symposium Workshops (IPDPSW), 2014 IEEE International
  • Conference_Location
    Phoenix, AZ
  • Print_ISBN
    978-1-4799-4117-9
  • Type

    conf

  • DOI
    10.1109/IPDPSW.2014.25
  • Filename
    6969387