DocumentCode
1672609
Title
New block demodulator with an automatic equalizer
Author
Matsui, Masaki ; Hagiwara, Manabu ; Nakagawa, Masao
Author_Institution
Fac. of Sci. & Technol., Keio Univ., Yokohama, Japan
fYear
1989
Firstpage
1827
Abstract
A block demodulator with an automatic equalizer is proposed. A new complex block equalizer that uses a direct algorithm based on the minimum-mean-square-error criterion is utilized to make the most of the block demodulation. The speed of convergence can be increased by changing the number of taps in the automatic equalizer. Computer simulation shows that the proposed system has superior performance compared with the conventional block demodulators. For example, the mean square error of the data in the proposed block demodulator becomes 1/100 of that in the conventional system at SNR=30 dB
Keywords
demodulators; equalisers; SNR; automatic equalizer; block demodulator; complex block equalizer; direct algorithm; minimum-mean-square-error criterion; number of taps changing; performance; speed of convergence; Computer simulation; Convergence; Data mining; Delay; Demodulation; Equalizers; Frequency estimation; Mean square error methods; Phase shift keying; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/ISCAS.1989.100722
Filename
100722
Link To Document