Title :
A 0.12 μm CMOS DVB-T tuner
Author :
Saias, D. ; Montaudon, F. ; Andre, E. ; Bailleul, F. ; Bely, M. ; Busson, P. ; Dedieu, S. ; Dezzani, A. ; Moutard, A. ; Provins, G. ; Rouat, E. ; Roux, J. ; Wagner, G. ; Paillardet, F.
Author_Institution :
STMicroelectronics, Crolles, France
Abstract :
A DVB-T tuner is integrated in 0.12 μm CMOS. The 16mm2 chip integrates a double conversion chain including PLL, VCO, voltage regulators, and ADC. The receiver exhibits a 6.5dB NF, a VCO phase noise of -140dBc/Hz at 1MHz offset at 1.21GHz, and a 14b ADC. It is compatible for integration with a digital demodulator IP.
Keywords :
CMOS integrated circuits; analogue-digital conversion; digital video broadcasting; phase locked loops; television receivers; tuning; voltage regulators; voltage-controlled oscillators; 0.12 micron; 1.21 GHz; 14 bit; 6.5 dB; ADC; CMOS DVB-T tuner; PLL; TV receiver; VCO; digital demodulator IP; double conversion chain; voltage regulators; CMOS process; Digital video broadcasting; Filters; Gain measurement; Impedance matching; Linearity; Noise measurement; Phase noise; Tuners; Voltage-controlled oscillators;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1494053
