DocumentCode :
1673288
Title :
A 3-bit 4th-order Σ-Δ modulator with metal-connected multipliers for fractional-N frequency synthesizer
Author :
Lee, Kun-Seok ; Park, Byeong-Ha
Author_Institution :
Samsung Electron., Kyounggi, South Korea
fYear :
2003
Firstpage :
177
Lastpage :
180
Abstract :
This paper presents a 3-bit 4th-order Σ-Δ modulator for fractional-N frequency synthesizer. The modulator employs an interpolative architecture with multiple feedback paths and metal-connected multipliers to implement the feedback coefficients, resulting in a simple hardware complexity. A frequency synthesizer with the proposed modulator exhibits lower out-of-band phase noise, a frequency resolution of 6-Hz, and fast switching time. The experimental results show -82 dBc/Hz in-band phase noise and -140 dBc/Hz out-of-band phase noise at 1 MHz offset frequency. The fractional spurs are less than -80 dBc. A prototype has been implemented in 0.5-μm BiCMOS technology.
Keywords :
BiCMOS integrated circuits; circuit feedback; frequency synthesizers; multiplying circuits; phase noise; sigma-delta modulation; Σ-Δ modulator; 0.5 micron; 3 bit; BiCMOS technology; fractional spur; fractional-N frequency synthesizer; frequency resolution; hardware complexity; in-band phase noise; interpolative architecture; metal-connected multiplier; multiple feedback paths; out-of-band phase noise; switching time; Channel spacing; Charge pumps; Delta modulation; Feedback; Frequency synthesizers; Hardware; Phase detection; Phase frequency detector; Phase modulation; Phase noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE
ISSN :
1529-2517
Print_ISBN :
0-7803-7694-3
Type :
conf
DOI :
10.1109/RFIC.2003.1213920
Filename :
1213920
Link To Document :
بازگشت