Title :
A low-noise low-voltage CT ΔΣ modulator with digital compensation of excess loop delay
Author :
Fontaine, Paul ; Mohieldin, Ahmed N. ; Bellaouar, Abdellatif
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
Abstract :
The implementation of a 3rd-order 50MS/s CT ΔΣ modulator with 5 levels of quantization, for a CDMA2k receiver, is presented. Its 9nVrms/√Hz input referred noise produces 80dB of DR in a 600kHz BW for signals as low as 70mVrms. It draws 4mA from a single 1.5V supply, uses a 90nm CMOS process and occupies 0.25mm2.
Keywords :
3G mobile communication; CMOS integrated circuits; delays; delta-sigma modulation; low-power electronics; radio receivers; 1.5 V; 4 mA; 600 kHz; 90 nm; CDMA2k receiver; CMOS process; digital compensation; excess loop delay; low-noise CT ΔΣ modulator; low-voltage CT ΔΣ modulator; quantization; Bandwidth; CMOS technology; Clocks; Delay; Delta modulation; Digital modulation; Digital signal processing; Energy consumption; Feedback; Transconductance;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1494087
